Browse DORAS
Browse Theses
Search
Latest Additions
Creative Commons License
Except where otherwise noted, content on this site is licensed for use under a:

Author: Kanatharana, Jarujit

Number of items: 2.

2004

McNally, Patrick J. and Kanatharana, Jarujit and Toh, B.H.W. and McNeill, D.W. and Danilewsky, A.N. and Tuomi, T. and Knuuttila, L. and Riikonen, J. and Toivonen, J. and Simon, R. (2004) Geometric linewidth and the impact of thermal processing on the stress regimes induced by electroless copper metallization for Si integrated circuit interconnect technology. Journal of Applied Physics, 96 (12). ISSN 0021-8979

2003

Kanatharana, Jarujit (2003) Examination of solder bump reflow process and copper metallisation process induced stress distribution in silicon substrates using synchrotron x-ray topography, micro-raman spectroscopy and finite element modelling. PhD thesis, Dublin City University.

This list was generated on Fri May 26 04:53:30 2017 IST.