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Author: Wang, Xiaojun

Number of items: 18.

2010

Kennedy, Alan and Wang, Xiaojun and Liu, Zhen and Liu, Bin (2010) Ultra-high throughput string matching for deep packet inspection. In: DATE 2010 - Design, Automation and Test in Europe Conference and Exhibition, 8-12 March 2010, Dresden, Germany. ISBN 978-1-4244-7054-9

2009

Wang, Xiaofei and Lin, Wei and Tang, Yi and Lall, Ashwin and Liu, Bin and Wang, Xiaojun (2009) A scalable bloom filter based prefilter and hardware-oriented predispatcher. In: INFOCOM Workshops 2009, 19-25 April 2009, Rio de Janeiro, Brazil. ISBN 978-1-4244-3968-3

Wang, Xiaofei and Jiang, Junchen and Lin, Wei and Tang, Yi and Wang, Xiaojun and Liu, Bin (2009) Extraction of fingerprint from regular expression for efficient prefiltering. In: ICCTA 2009 - International Conference on Communications Technology and Applications, 16-18 October 2009 , Beijing, China. ISBN 978-1-4244-4816-6

Bermingham, David and Liu, Zhen and Wang, Xiaojun and Liu, Bin (2009) Field-based branch prediction for packet processing engines. In: ICPADS 2009 - 15th International Conference on Parallel and Distributed Systems, 8-11 December 2009, Shenzhen, China. ISBN 978-1-4244-5788-5

Wang, Cong and Morris, Joseph and Wang, Xiaojun (2009) High performance deep packet inspection on multi-core platform. In: IC-BNMT 2009 - 2nd IEEE International Conference on Broadband Network & Multimedia Technology, 18-20 October 2009 , Beijing, China. ISBN 978-1-4244-4590-5

Kennedy, Alan and Liu, Zhen and Wang, Xiaojun and Liu, Bin (2009) Multi-engine packet classification hardware accelerator. In: ICCCN 2009 - 18th International Conference on Computer Communications and Networks, 3-6 August 2009 , San Francisco, CA, USA. ISBN 978-1-4244-4581-3

2008

Bermingham, David and Liu, Zhen and Wang, Xiaojun and Liu, Bin (2008) Branch prediction for network processors. In: ICM 2008 - International Conference on Microelectronics, 14-17 December 2008, Sharjah, United Arab Emirates. ISBN 978-1-4244-2369-9

Kennedy, Alan and Wang, Xiaojun and Liu, Bin (2008) Energy efficient packet classification hardware accelerator. In: IPDPS 2008 - IEEE International Symposium on Parallel and Distributed Processing, 14-18 April 2008, Miami, FL, USA. ISBN 978-1-4244-1693-6

Liu, Zhen and Yu, Jia and Wang, Xiaojun and Liu, Bin and Bhuyan, Laxmi (2008) Revisiting the cache effect on multicore multithreaded network processors. In: DSD 2008 - 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, 3-5 September 2008 , Parma, Italy. ISBN 978-0-7695-3277-6

2007

Kennedy, Alan and Bermingham, David and Wang, Xiaojun and Liu, Bin (2007) Power analysis of packet classification on programmable network processors. In: ICSPC 2007 - IEEE International Conference on Signal Processing and Communications, 24-27 November 2007, Dubai, United Arab Emirates. ISBN 978-1-4244-1235-8

2003

Weng, Li-Chuan and Wang, Xiaojun and Liu, Bin (2003) A survey of dynamic power optimization techniques. In: IWSOC 2003 - 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 30 June - 2 July 2003 , Calgary, Alberta, Canada. ISBN 0-7695-1944-X

2001

Muresan, Valentin and Wang, Xiaojun and Muresan, Valentina and Vladutiu, M. (2001) A combined tree growing technique for block-test scheduling under power constraints. In: ISCAS 2001 - IEEE International Symposium on Circuits and Systems, 6-9 May 2001, Sydney, NSW, Australia. ISBN 0-7803-6685-9

2000

Muresan, Valentin and Wang, Xiaojun and Muresan, Valentina and Vladutiu, M. (2000) A comparison of classical scheduling approaches in power-constrained block-test scheduling. In: International Test Conference 2000, 3-5 October 2000, Atlantic City, NJ, USA. ISBN 0-7803-6546-1

Muresan, Valentin and Wang, Xiaojun and Muresan, Valentina and Vladutiu, M. (2000) Distribution-graph based approach and extended tree growing technique in power-constrained block-test scheduling. In: ATS 2000 - 9th Asian Test Symposium, 4-6 December 2000, Taipei, Taiwan. ISBN 0-7695-0887-1

Muresan, Valentin and Wang, Xiaojun and Muresan, Valentina and Vladutiu, M. (2000) Power-constrained block-test list scheduling. In: RSP 2000 - 11th International Workshop on Rapid System Prototyping, 21-23 June 2000, Paris, France. ISBN 0-7695-0668-2

Muresan, Valentin and Wang, Xiaojun and Muresan, Valentina and Vladutiu, M. (2000) The left edge algorithm in block test scheduling under power constraints. In: ISCAS 2000 - IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century, 28-31 May 2000, Geneva, Switzerland. ISBN 0-7803-5482-6

1999

Ding, Jin and Wang, Xiaojun and McCorkell, Charles (1999) Fuzzy approach to multimedia faulty module replacement. In: APCC/OECC 1999 - Fifth Asia-Pacific Conference on Communications and Fourth Optoelectronic and Communications Conference, Beijing, China , 18-22 October 1999. ISBN 7-5635-0402-8

1997

McMorrow, Gabriel and Wang, Xiaojun and Whelan, Paul F. (1997) Color-to-speech sensory substitution device for the visually impaired. In: Machine Vision Applications, Architectures, and Systems Integration VI 1997, 15-16 October 1997, Pittsburgh, USA.

This list was generated on Thu Jun 22 07:49:44 2017 IST.