Browse DORAS
Browse Theses
Search
Latest Additions
Creative Commons License
Except where otherwise noted, content on this site is licensed for use under a:

Supervisors: Wang, Xiaojun

Number of items: 9.

Doctoral Thesis

Cronin, Brendan (2014) Hardware acceleration of network intrusion detection and prevention. PhD thesis, Dublin City University.

Zhou, Yachao (2012) Hardware acceleration for power efficient deep packet inspection. PhD thesis, Dublin City University.

Wang, Xiaofei (2012) High performance stride-based network payload inspection. PhD thesis, Dublin City University.

Bermingham, David (2010) Branch Prediction For Network Processors. PhD thesis, Dublin City University.

Kennedy, Alan (2010) Energy Efficient Hardware Accelerators for Packet Classification and String Matching. PhD thesis, Dublin City University.

Muresan, Valentin (2002) Block-level test scheduling under power dissipation constraints. PhD thesis, Dublin City University.

Masters Thesis

Huang, Jing (2012) Optimizing energy-efficiency for multi-core packet processing systems in a compiler framework. Master of Engineering thesis, Dublin City University.

Weng, Li-Chuan (2004) Block level voltage. Master of Engineering thesis, Dublin City University.

Gao, Liang (2004) Power constrained test scheduling in system-on-chip design. Master of Engineering thesis, Dublin City University.

This list was generated on Tue Nov 25 08:47:13 2014 GMT.