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A survey of dynamic power optimization techniques

Weng, Li-Chuan and Wang, Xiaojun and Liu, Bin (2003) A survey of dynamic power optimization techniques. In: IWSOC 2003 - 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 30 June - 2 July 2003 , Calgary, Alberta, Canada. ISBN 0-7695-1944-X

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Abstract

One of the most important considerations for the current VLSI/SOC design is power, which can be classified into power analysis and optimization. In this survey, the main concepts of power optimization including the sources and policies are introduced. Among the various approaches, dynamic power management (DPM), which implies to change devices states when they are not working at the highest speed or at their full capacity, is the most efficient one. Our explanations accompanying the figures specify the abstract concepts of DPM. This paper briefly surveys both heuristic and stochastic policies and discusses their advantages and disadvantages.

Item Type:Conference or Workshop Item (Paper)
Event Type:Workshop
Refereed:Yes
Uncontrolled Keywords:VLSI; integrated circuit design; low-power electronics; optimisation; power consumption; system-on-chip;
Subjects:Engineering > Electronic engineering
DCU Faculties and Centres:DCU Faculties and Schools > Faculty of Engineering and Computing > School of Electronic Engineering
Publisher:Institute of Electrical and Electronics Engineers
Official URL:http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1213004&isnumber=27279
Copyright Information:©2003 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
ID Code:15545
Deposited On:22 Jul 2010 15:41 by DORAS Administrator. Last Modified 22 Jul 2010 15:41

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