Revisiting the cache effect on multicore multithreaded network processors
Liu, Zhen, Yu, Jia, Wang, Xiaojun, Liu, Bin and Bhuyan, Laxmi
(2008)
Revisiting the cache effect on multicore multithreaded network processors.
In: DSD 2008 - 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, 3-5 September 2008, Parma, Italy.
ISBN 978-0-7695-3277-6
Caching mechanism has achieved great success in general purpose processor; however, its deployment in Network Processor (NP) raises questions over its effectiveness under the new context. In this study, we thoroughly evaluate the performance of caches in NP with architectural features like multicore, multithread, and integrated packet interface. Our major findings include: (1) In general, a sufficiently large cache effectively reduces the number of memory requests and improves the utilization of the NP computation power. (2) The lower efficiency of private caches caused by duplicate information deteriorates the NP performance under certain circumstances. (3) The appropriate cache block size is constrained by the low spatial locality of network applications. (4) For workloads involving large amount of data movement, increasing cache size cannot bring more benefits when the bottleneck in interconnection bus is reached. In short, caching mechanism in NP can be helpful under appropriate usage.
Proceedings of the 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools.
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Institute of Electrical and Electronics Engineers. ISBN 978-0-7695-3277-6