Energy efficiency is becoming a prominent issue in ICT networks. Many approaches have been proposed to reduce the power consumption of ICT network devices. Among those green approaches, dynamic frequency scaling (DFS) offers an elegant solution for improving the energy efficiency of processors. To evaluate the impact of different DFS techniques on energy efficiency of real network devices, this work designs a prototype of a novel energy-aware Frequency Adaptive Router (FAR) that dynamically scales the operating frequency of core logic FPGA processor among five different processing capacities in response to traffic load, rather than leaving the network devices running on its maximum processing capacity all the time. Three dynamic frequency adaptation control policies are introduced into the FAR to balance the trade-off between performance and power consumption. Based on statistics monitoring and preset thresholds, the proposed dynamic frequency adaptation control policies can manage the FAR to always operate at the lowest processing capacity required to handle instantaneous traffic load without affecting the quality of service (QoS). The implementation of these frequency adaptation control policies involves assessing an associated traffic throughput threshold beyond which the router will begin to lose packets for each of the five operating frequencies, and then adaptively scaling the operating frequency in response to the instantaneous traffic load to save energy without compromising end-to-end QoS. The energy efficiency and performance of the FAR is evaluated at the five different operating frequencies with different number of active ports, traffic bit rates and packet sizes. The evaluation results show that when in idle state, the FAR can significantly save power of up to 52%. Experiments with synthetic traces indicate that 46% of power can be saved while maintaining required QoS. Similar results can be expected when these general power-saving principles are applied in future commercial routers.